SEMICONDUCTOR FUNDAMENTALS · DIE-TO-DIE STANDARD
What Is UCIe?
The open package-level interconnect intended to help chiplets communicate across a common interface.
Universal Chiplet Interconnect Express, or UCIe, is an open specification for connecting dies within a package. It defines die-to-die layers and supports established protocols and streaming traffic, helping the industry build interoperable chiplet ecosystems.
What the specification covers
UCIe defines a physical layer, die-to-die adapter and protocol framework for package-level links. The goal is to deliver high bandwidth, low latency and energy-efficient communication across short distances. It can transport PCI Express and Compute Express Link traffic as well as raw or streaming protocols for specialized designs.
Standard and advanced packages
The specification supports connectivity across conventional organic-substrate packages and across advanced package technologies with denser bump pitches. Implementations can select data rates, lane arrangements and reliability features suited to the product and package.
Why interoperability matters
A common interface can let design teams reuse chiplets, mix functions developed on different schedules and reduce the need to invent every die-to-die link. It may eventually support components from multiple suppliers, although electrical compliance alone is not enough: form factors, management, security, thermal design, qualification and commercial agreements must also align.
A developing standard
UCIe continues to evolve. The consortium’s published UCIe 3.0 specification adds 48 and 64 GT/s data rates while retaining backward compatibility and extending manageability and system functions. Earlier releases established the base stack and added capabilities including support for 3D packaging. Product support should always be checked against the specific version and optional features implemented.
Why this matters for Japan
UCIe is relevant to Japan because an open die-to-die interface can lower one barrier to building systems from specialized chiplets. Japanese device makers, automotive suppliers and industrial companies could combine custom logic with memory, I/O or sensor dies while drawing on domestic packaging, materials and test capabilities. The commercial opportunity will depend on more than compliance with the interface: Japan will also need design tools, reusable IP, qualified package technologies and partnerships that make chiplets available as dependable products.
Frequently asked questions
Is UCIe a physical connector?
No. It is a specification for very short electrical connections between dies inside a package.
Does UCIe require chiplets from different vendors?
No. A company can use UCIe internally; multi-vendor interoperability is a broader ecosystem objective.
Is UCIe the same as CXL?
No. CXL is a protocol for coherent processor and device connectivity. UCIe can carry CXL across a die-to-die package link.
Official sources
Last reviewed: August 2026. SemiStructure provides independent educational material; specifications and product roadmaps can change.
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